60 Second Display
In this project, we had to design a circuit that could count from 00-59. The circuit had to use a clock and have a reset switch that was capable of resting the count to 00 no matter what number the count was on. The ones unit display, which counts from 0-9, is controlled by the synchronous counter, 74LS163. The tens unit display, which counts from 0-6, is controlled by the asynchronous counter, 74LS193.
PLD Circuit
This project is similar to the previous DMV Display project. The basic function of the circuit that is created in these projects is the same in the sense that it has to count up from 0 to a selected number, however these numbers are different in the two projects, and the components used are different. In the previous project, a 74LS93 counter, combined with D flip flops were used to create the circuit. In this project a 74LS163 counter and JK flip flops were used to create the circuit. The range of the counter in the DMV project was 0-80, while the range of the counter in this project is 0-59.
Conclusion
There are two main types of circuits: synchronous and asynchronous. Asynchronous counters are not in time with the clock signal, instead the clock of each flip flop is wired to the output of the previous flip flop. The 74LS196 chip has an asynchronous load and clear. This chip can count both up and down, and the last number displayed is one number before the number that is being detected. Synchronous counters, however, are in time with the clock. The input of each flip flop is wired directly to the clock that that the two are synchronized. The 74LS163 chip is a chip that has a synchronous load and clear. This chip can only count up, and the number that is detected is the last number that is displayed, unlike most other chips.
When designing this circuit, we were required to use a 74LS163 chip, as well as JK flip flops. The clock for the circuit was connected to the clock on the 74LS163 chip. All inputs, A-D were connected to a digital low so that the first number displayed would be a 0 (0000). The outputs of this chip were wired to their corresponding spot in the multiplexor. Then I used a four input NAND gate to detect the output. Using two inverters, I wired it so that the number 9 (1001) was detected. Because this is a 74LS163 chip, the last number that is displayed is the nine that was detected. The output of this NAND gate was wired to the load of the 74LS163 chip, to the clock of the first JK flip flop, and also to another NAND gate. The output of the next NAND gate had two inputs, one from the output of the previous NAND gate, and one from the reset switch. The output of this NAND gate was the clear of the 74LS163 chip. I used negative edge triggered JK flip flops, so output Q had to be wired to the clock of the following flip flop. Each output Q was also wired to the multiplexor. There was a three input NAND gate used to detect the output. The NAND gate was wired to NotQ, Q and Q which means that 011 was the number being detected. Because these are JK flip flops, the number one before the detected number is the last number that is displayed. Since this NAND gate is detecting a 6, the last number shown on the display is a 5. The output of the three input NAND gate is wired to an AND gate. The other input of the AND gate is connected to an inverter, which is connected to the reset switch. The output of the AND gate is connected to all of the clears of the three JK flip flops. The presets on each of the JK flip flops are connected to power. Because the reset switch is connected to both circuits, it can override both circuits at any time, no matter the count, and set them both back to zero.
Some of my classmates had different circuits than the one that I created. In my circuit there is an inverter placed before the reset switch which allows both of the circuits to work at the same time. Some of my classmates didn't need this inverter, and some placed the inverter in between the output of one circuit and the clock of the next circuit.
When designing this circuit, we were required to use a 74LS163 chip, as well as JK flip flops. The clock for the circuit was connected to the clock on the 74LS163 chip. All inputs, A-D were connected to a digital low so that the first number displayed would be a 0 (0000). The outputs of this chip were wired to their corresponding spot in the multiplexor. Then I used a four input NAND gate to detect the output. Using two inverters, I wired it so that the number 9 (1001) was detected. Because this is a 74LS163 chip, the last number that is displayed is the nine that was detected. The output of this NAND gate was wired to the load of the 74LS163 chip, to the clock of the first JK flip flop, and also to another NAND gate. The output of the next NAND gate had two inputs, one from the output of the previous NAND gate, and one from the reset switch. The output of this NAND gate was the clear of the 74LS163 chip. I used negative edge triggered JK flip flops, so output Q had to be wired to the clock of the following flip flop. Each output Q was also wired to the multiplexor. There was a three input NAND gate used to detect the output. The NAND gate was wired to NotQ, Q and Q which means that 011 was the number being detected. Because these are JK flip flops, the number one before the detected number is the last number that is displayed. Since this NAND gate is detecting a 6, the last number shown on the display is a 5. The output of the three input NAND gate is wired to an AND gate. The other input of the AND gate is connected to an inverter, which is connected to the reset switch. The output of the AND gate is connected to all of the clears of the three JK flip flops. The presets on each of the JK flip flops are connected to power. Because the reset switch is connected to both circuits, it can override both circuits at any time, no matter the count, and set them both back to zero.
Some of my classmates had different circuits than the one that I created. In my circuit there is an inverter placed before the reset switch which allows both of the circuits to work at the same time. Some of my classmates didn't need this inverter, and some placed the inverter in between the output of one circuit and the clock of the next circuit.